A motherboard of a personal computer or a notebook computer is basically constructed by a central processing unit (CPU), a chipset for controlling various devices, and some peripheral circuits. The CPU is the core of the whole computer system. The major tasks of the CPU are processing and controlling of the interactions among parts of the computer system, and logic operations. The chipset consisting of one or more chips assembled in various ways works for coordinating the CPU and peripheral devices. One of the most popular chipset configurations is a combination of two chips. One is so-called as a north bridge chip and the other a south bridge chip. The north bridge takes charge of all hi-speed buses, basically from 2 GBps to 5 GBps, on the motherboard. The south bridge chip is in charge of communications among I/O buses that have relatively slow transmission speed, basically from 10 MBps and 1 GBps. The south bridge chip also communicates with the basic input output system (BIOS) of the computer system.
Referring to FIG. 1, a common configuration of a motherboard 1 is shown. A CPU 11 is coupled to a chipset 12 that consists of a north bridge chip 121 and a south bridge chip 122. The north bridge chip 121 connects to the CPU 11 via a front side bus (FSB) 101, connects to a main memory or system memory 13 via a memory bus 102, and communicates with the accelerated graphics port (AGP) 14 via an AGP bus 103. The south bridge chip 122 connects to a peripheral component interconnect (PCI) interface 15 via a PCI bus 104, and connects to other peripheral devices such as industry standard architecture (ISA) interface 16, universal serial bus (USB) interface 17, integrated drive electronics (IDE) interface 18, mouse 19, and keyboard 20. A newly developed serial advanced technology attachment (SATA) interface 21 is also coupled to the south bridge chip 122.
To operate the computer system normally, the CPU 11 has to be in concert with the north bridge chip 121 and the south bridge chip 122 so that various electronic devices coupled to the chipset via various interfaces, e.g. liquid crystal display, CD-ROM drive, hard disc drive, floppy disc drive, keyboard and mouse, can be well controlled by the CPU 11. For reducing power consumption of the system, it is advantageous to opportunely rest the CPU 11, i.e. enter the CPU 11 into an idle state, when there is no program being executed and no peripheral devices being operated in the computer system for a specified duration.
Nowadays, USB interface has become one of the most popular transmission interfaces due to the features of high speed and easy operation. The USB interface is coupled to a USB host controller 1220 disposed in the south bridge chip to communicate the peripheral device coupled thereto with the south bridge chip 122.
Generally, the USB host controller 1220 has its own power-saving mechanism. When the USB host controller 1220 detects that there is no more task to be executed, an idle state specific to the USB host controller 1220 will be entered. The USB host controller 1220 is then awakened as a result of timing. That is, when the timer 1221 disposed in the USB host controller 1220 determines that a preset time threshold is due, the USB host controller 1220 restores from the idle state and actively reads updated descriptor data from the main memory 13, if any, so as to execute necessary tasks. The accessing operation to the main memory 13 to read the updated descriptor data, on the other hand, will cause the CPU 11 to restore from the CPU idle state. Accordingly, the CPU 11 cannot be rested effectively but has to be redundantly awakened. As a result, the power-saving effect of the computer system is limited.